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| Commit | 804677a5f7649f9b78cced7381d0b1029b5be680 (patch) | |
|---|---|---|
| Author | 2024-02-26 09:39:01 +0200 | |
| Committer | 2024-02-26 09:39:01 +0200 | |
| Files | 19fdea926e1124d23e8807704faa591d0bc17699 | |
| syndamia.com-804677a5f7649f9b78cced7381d0b1029b5be680.tar syndamia.com-804677a5f7649f9b78cced7381d0b1029b5be680.tar.gz syndamia.com-804677a5f7649f9b78cced7381d0b1029b5be680.zip | ||
| Parent | 5b177a7f7b75183cdd2fd92b7868cbe871863263 (diff) | |
(tutorials/fqc) Converted post to MEL format
1 files changed, 1 insertions, 1 deletions
| -rw-r--r-- | src/tutorials/fix-qc-timeout/index.md | 2 |
diff --git a/src/tutorials/fix-qc-timeout/index.md b/src/tutorials/fix-qc-timeout/index.md index fe93cdf..9b02a48 100644 --- a/src/tutorials/fix-qc-timeout/index.md +++ b/src/tutorials/fix-qc-timeout/index.md @@ -37,7 +37,7 @@ libata.force=3.01:nodmalog ## Explanation -&&important The following is how I understand the issue, but I did not find definitive proof thats exactly what happens. +&:important The following is how I understand the issue, but I did not find definitive proof thats exactly what happens. Take this section with a grain of salt. A harddrive can support [dma transfers](https://en.wikipedia.org/wiki/Direct_memory_access), normally the CPU would handle data transfer from the harddrive to the system memory (RAM), meaning it asks for a bit of data, waits, when the data comes, puts it in memory, then asks for next bit and so on. |