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+;;;; Processor
+
+;;; Processor function
+;;;
+;;; Each time the *CPU* is called, it executes one operation, meaning it reads the
+;;;   next value in *M*, when an opcode, it either executes it, or if the opcode
+;;;   needs a value, gets ready to read it from the next address and do something
+;;;
+;;; The implementation uses closures for the internal registers.
+(defparameter *CPU* (let ((PC 0) (AC 0) (X 0) (Y 0) (SR 0) (SP 0)) #'(lambda ()
+  (let ((mval (nth PC *M*)))
+    (if (eql mval +OP_BRK+)
+      ()
+    (if (eql mval +OP_ORAxi+)
+      ()))))))
+
+;;; External memory, where the zero page, stack and general purpose memory resides
+;;; Another file has to implement it.
+(defvar *M*)
+
+;;; Processor opcodes
+;;; Ends with a small letter, depending on address mode:
+;;;   ac  | accumulator
+;;;   a   | absolute
+;;;   ax  | absolute, X-indexed
+;;;   ay  | absolute, Y-indexed
+;;;   d   | immediate
+;;;       | implied
+;;;   i   | indirect
+;;;   xi  | X-indexed, indirect
+;;;   iy  | indirect, Y-indexed
+;;;   r   | relative
+;;;   z   | zeropage
+;;;   zx  | zeropage, X-indexed
+;;;   zy  | zeropage, Y-indexed
+(defconstant +OP_BRK+   #x00)
+(defconstant +OP_ORAxi+ #x01)
+(defconstant +OP_ORAz+  #x05)
+(defconstant +OP_ASLz+  #x06)
+(defconstant +OP_PHP+   #x08)
+(defconstant +OP_ORAd+  #x09)
+(defconstant +OP_ASLac+ #x0A)
+(defconstant +OP_ORAa+  #x0D)
+(defconstant +OP_ASLa+  #x0E)
+
+
+(defconstant +OP_BPLr+  #x10)
+(defconstant +OP_ORAiy+ #x11)
+(defconstant +OP_ORAzx+ #x15)
+(defconstant +OP_ASLzx+ #x16)
+(defconstant +OP_CLC+   #x18)
+(defconstant +OP_ORAay+ #x19)
+(defconstant +OP_ORAax+ #x1D)
+(defconstant +OP_ASLax+ #x1E)
+
+(defconstant +OP_JSRa+  #x20)
+(defconstant +OP_ANDxi+ #x21)
+(defconstant +OP_BITz+  #x24)
+(defconstant +OP_ANDz+  #x25)
+(defconstant +OP_ROLz+  #x26)
+(defconstant +OP_PLP+   #x28)
+(defconstant +OP_ANDd+  #x29)
+(defconstant +OP_ROLac+ #x2A)
+(defconstant +OP_BITa+  #x2C)
+(defconstant +OP_ANDa+  #x2D)
+(defconstant +OP_ROLa+  #x2E)